首页>
外国专利>
System and method for achieving timing closure in fixed placed designs after implementing logic changes
System and method for achieving timing closure in fixed placed designs after implementing logic changes
展开▼
机译:在实现逻辑更改后在固定放置的设计中实现时序收敛的系统和方法
展开▼
页面导航
摘要
著录项
相似文献
摘要
A system and method for implementing logic changes in integrated circuits (ICs). In a preferred embodiment, donor logic elements are taken from donator logic paths. The donated cells are implemented into a logic path altered by an ECO. The donated cell is replaced by spare cells. Timing analysis is done to ensure all logic paths are timing closed.
展开▼