首页> 外国专利> Method of fabricating flip chip semiconductor device utilizing polymer layer for reducing thermal expansion coefficient differential

Method of fabricating flip chip semiconductor device utilizing polymer layer for reducing thermal expansion coefficient differential

机译:利用聚合物层减小热膨胀系数差的倒装芯片半导体器件的制造方法

摘要

An improved flip chip assembly is disclosed of the type where a semiconductor chip having a certain thermal expansion coefficient is directly mounted via solder bumps on the metallization pattern of a circuit substrate having a different thermal expansion coefficient. A base layer comprised of a polymer material is disposed over the surface of the chip, between the chip and the substrate, and the solder bumps are placed over the base layer; the base layer modifies the effective thermal expansion coefficient of the solder bumps to approximate that of the substrate, thus reducing the thermal expansion coefficient differential at the junction of the chip and the substrate.
机译:公开了一种改进的倒装芯片组件,其中具有一定热膨胀系数的半导体芯片通过焊料凸点直接安装在具有不同热膨胀系数的电路基板的金属化图案上。由聚合物材料构成的基础层设置在芯片表面上方,芯片与基板之间,并且焊料凸块设置在基础层上方;基层修改了焊料凸点的有效热膨胀系数,使其近似于基板的有效热膨胀系数,从而减小了芯片和基板的接合处的热膨胀系数差。

著录项

  • 公开/公告号US6830999B2

    专利类型

  • 公开/公告日2004-12-14

    原文格式PDF

  • 申请/专利权人 AGERE SYSTEMS INC.;

    申请/专利号US20020173182

  • 发明设计人 RAJAN D. DESHMUKH;

    申请日2002-06-17

  • 分类号H01L214/40;

  • 国家 US

  • 入库时间 2022-08-21 22:19:22

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