An electrostatic discharge (ESD) protection circuit which includes an Insulated Gate Bipolar Transistor (IGBT), a collector clamp, and a resistor. The IGBT collector is coupled with a circuit pad, and the emitter is coupled to ground. The collector clamp is coupled with the pad and the IGBT gate, and the resistor is coupled with the IGBT emitter and gate. When the voltage at the pad is below the trigger voltage of collector clamp, the collector clamp remains in a blocking state, thus preventing the IGBT from conducting. At the onset of an ESD event, when a voltage greater than the trigger voltage of the collector clamp appears at the pad, the collector clamp conducts, causing current flow through the resistor, thus turning on the IGBT and latching a parasitic thyristor formed in the IGBT until the ESD charge is dissipated.
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