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Memory controller and method using read and write queues and an ordering queue for dispatching read and write memory requests out of order to reduce memory latency

机译:使用读取和写入队列以及用于无序分配读取和写入内存请求的排序队列的内存控制器和方法

摘要

In one of the many embodiments disclosed herein, a method for dispatching read and write requests to a memory is disclosed which includes queuing at least one write request in a write queue and queuing an incoming read request in a read queue. The method also includes comparing the read request with at least one write request in the write queue to detect a matching write request, and if there is a matching write request, storing a write queue index of the matching write request as a first entry in an ordering queue. The method further includes dispatching the at least one write request to the memory in response to the first ordering queue entry.
机译:在本文公开的许多实施例中的一个中,公开了一种用于向存储器分配读取和写入请求的方法,该方法包括将至少一个写入请求排队在写入队列中以及将进入的读取请求排队在读取队列中。该方法还包括将读取请求与写入队列中的至少一个写入请求进行比较以检测匹配的写入请求,并且如果存在匹配的写入请求,则将匹配的写入请求的写入队列索引作为第一条目存储在存储器中。订购队列。该方法还包括响应于第一排序队列条目而将至少一个写请求分派到存储器。

著录项

  • 公开/公告号US6877077B2

    专利类型

  • 公开/公告日2005-04-05

    原文格式PDF

  • 申请/专利权人 BRIAN J. MCGEE;JADE B. CHAU;

    申请/专利号US20010020565

  • 发明设计人 BRIAN J. MCGEE;JADE B. CHAU;

    申请日2001-12-07

  • 分类号G06F12/00;

  • 国家 US

  • 入库时间 2022-08-21 22:19:10

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