Formation of semiconductor structure for CMOS device port electrodes, by applying metal silicide formation rate retarding or accelerating agents to metal silicide regions

摘要

Agent is applied to a first region of the semiconductor body (1) in order to slow down the metal-rich silicide formation rate and/or an agent is applied to a second region in order to accelerate the metal-rich silicide formation rate. Preparing a semiconductor structure comprising a silicon semiconductor body (1) with first and second regions comprises the following steps: (a) providing the first and second regions with a connection zone by depositing a layer of metal which reacts with silicon to form a metal silicide; (b) applying a growth retarding agent to the first region in order to slow down the metal-rich silicide formation rate in this region and/or applying a growth accelerating agent to the second region in order to accelerate the metal-rich silicide formation rate in this region; and (c) converting the metal silicide into a metal-rich silicide in the first and second regions. An independent claim is also included for a semiconductor device with a silicon semiconductor body including first and second regions comprising the same metal-rich silicide, the silicide in the first region having a different thickness than the silicide in the second region.