Frequency synthesizer using dividers low noise of half-integer numbers and analog gain compensation.

摘要

A SYNTHESIZER 10 FREQUENCY LOW NOISE USING DIVISORES 13, 15 FREQUENCY, AT LEAST ONE OF WHICH (divisor 15) can be increased and DISMIUIRSE IN STEP half-integer, and gain compensation ANALOG IN A DETECTOR 17 PHASE / FREQUENCY FOR LOW NOISE, SPURIOUS LOWER LEVELS AND SWITCHING SPEED FASTER THAN TRADITIONAL METHODS OF sYNTHESIS OF FREQUENCY. THE MAIN FEATURES herein are DIVIDERS 13, 15 half-integer and power to adjust the gain of phase detector TO OFFSET LOOP VARY BY THE NUMBERS splitters. SYNTHESIZER 10 comprises two pegs 13, 15, providing two frequency signals reference, which are a function of an input signal and a signal synthesizer output 10. A voltage regulation Oscillator (VCO) 18 provides the signal OUTPUT (FO) FREQUENCY SYNTHESIZER 10TH. A DETECTOR 17 PHASE / FREQUENCY COMPARING THE SIGNS OF REFERENCE FREQUENCY SIGNAL AND PROVIDES AN ERROR PHASE OUT O phase shift, which actuates the VCO 18. A digital controller, comprising a PROM 11 (Programmable Read Only Memory NVERTIDOR 12 DIGITAL aNALOG, ADJUSTING GAIN DETECTOR 17 PHASE MATCHING THE vARIATION splitters NUMEROS, and select these. THE sinter 10 has a phase noise LOWER, LOWER SPURIOUS LEVELS AND SWITCHING faster frequency channels. FOR GENERATING FEW STEPS FREQUENCY a given value, the number divisor is half the value of the steps. WITH A DIVIDED THAT IS HALF THE VALUE OF THE STEPS, THE CONTRIBUTION OF NOISE FROM THE sPLITTER IS DECLINING IN THAT AMOUNT. The phase margin improves with a corresponding decrease in PICO lOOP IN THE sPECTRUM OF NOISE. ALSO DESCRIBES A MISSILE RADAR SYSTEM EMPLOYING THIS synthesizer.