MINIMUM-DIMENSION, FULLY-SILICIDED MOS DRIVER AND ESD PROTECTION DESIGN FOR OPTIMIZED INTER-FINGER COUPLING

摘要

An electrostatic discharge (ESD) MOS transistor (400) including a plurality of interleaved fingers (304), where the MOS transistor (400) is formed in an I/O periphery of and integrated circuit (IC) (100) for providing ESD protection for the IC (100). The MOS transistor (400) includes a P-substrate (402) and a Pwell (406) disposed over the P-substrate (402). The plurality of interleaved fingers (304) each include an N+ source region (320), an N+ drain region (322), and a gate region (324) formed over a channel region (421) disposed between the source (320) and drain regions (322). Each source (320) and drain (322) includes a row of contacts that is shared by an adjacent finger, wherein each contact hole in each contact row has a distance to the gate region (324) defined under minimum design rules for core functional elements of the IC. The Pwell (406) forms a common parasitic bipolar junction transistor base for contemporaneously triggering each finger (304) of the MOS transistor (400) during an ESD event.