RF integrated circuit comprising a frequency synthesizer having a low sensitivity to frequency pulling

摘要

The circuit has an auxiliary frequency synthesizer (40) providing an auxiliary frequency signal with a frequency step. A main frequency synthesizer (30) has a phase locked loop including a mixer (32), a filter (33), a phase comparator (34) and a low-pass loop filter (35). The bandwidth of the loop is twice higher than the frequency step of the auxiliary signal. An independent claim is also included for a method of reducing injection locking in a radio frequency integrated circuit.