TEST SYSTEM FOR TESTING A NUMBER OF DUTS IN PARALLEL AND TEST METHOD THEREOF, ESPECIALLY INCLUDING A CHIP SELECTION SIGNAL CHANNEL FOR SELECTING DATA TO BE OUTPUT THROUGH A COMMON INPUT/OUTPUT CHANNEL

摘要

PURPOSE: A test system for testing a number of DUTs(Device Under Test) in parallel and a test method thereof are provided to increase test efficiency by testing a number of DUTs simultaneously, as using a limited number of channels of the test system for an integrated circuit device. CONSTITUTION: The test system includes a number of DUTs(Device Under Test)(100,200,300,400), and input/output signal channels(500,700,800,...) connected to pins for an input/output signal of the DUTs. A chip selection signal channel provides a chip selection signal(CS) to the DUT to specify one output data among output data which are to be output through the common input/output signal channel. And a test equipment(10) tests the DUTs through the input/output signal channel and the chip selection signal channel.