首页> 外国专利> SENSE AMPLIFICATION CIRCUIT COMPENSATING CAPACITANCE VARIATION CAUSED BY MISALIGN BETWEEN GATE PATTERN AND ACTIVE REGION

SENSE AMPLIFICATION CIRCUIT COMPENSATING CAPACITANCE VARIATION CAUSED BY MISALIGN BETWEEN GATE PATTERN AND ACTIVE REGION

机译:门模式与活动区域之间误导引起的感性放大电路补偿电容变化

摘要

PURPOSE: A sense amplification circuit is provided to increase yield by self-compensating of capacitance variation according to a misalign between a gate pattern and an active region. CONSTITUTION: A sense amplification circuit has a cross coupled structure. A first auxiliary active region(ACL1) corresponds with a first active region(A1,B1), wherein the first active region is connected to gates of a first PMOS transistor and a first NMOS transistor. A second auxiliary active region(ACR1) corresponds with a second active region(A2,B2), wherein the second active region is connected to gates of a second PMOS transistor and a second NMOS transistor. An auxiliary pattern(20) is positioned between the first and the second auxiliary active regions, and is varied as the position corresponding to misalignment between the transistor and the gate pattern.
机译:用途:提供了一种感应放大电路,以通过根据栅极图案和有源区域之间的未对准而对电容变化进行自补偿来提高产量。组成:感应放大电路具有交叉耦合结构。第一辅助有源区(ACL1)对应于第一有源区(A1,B1),其中第一有源区连接到第一PMOS晶体管和第一NMOS晶体管的栅极。第二辅助有源区(ACR1)对应于第二有源区(A2,B2),其中第二有源区连接到第二PMOS晶体管和第二NMOS晶体管的栅极。辅助图案(20)位于第一和第二辅助有源区之间,并且作为与晶体管和栅极图案之间的未对准相对应的位置而变化。

著录项

  • 公开/公告号KR20040102718A

    专利类型

  • 公开/公告日2004-12-08

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20030034298

  • 发明设计人 LEE HYEON U;

    申请日2003-05-29

  • 分类号H01L27/04;

  • 国家 KR

  • 入库时间 2022-08-21 22:06:25

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