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SENSE AMPLIFICATION CIRCUIT COMPENSATING CAPACITANCE VARIATION CAUSED BY MISALIGN BETWEEN GATE PATTERN AND ACTIVE REGION
SENSE AMPLIFICATION CIRCUIT COMPENSATING CAPACITANCE VARIATION CAUSED BY MISALIGN BETWEEN GATE PATTERN AND ACTIVE REGION
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机译:门模式与活动区域之间误导引起的感性放大电路补偿电容变化
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摘要
PURPOSE: A sense amplification circuit is provided to increase yield by self-compensating of capacitance variation according to a misalign between a gate pattern and an active region. CONSTITUTION: A sense amplification circuit has a cross coupled structure. A first auxiliary active region(ACL1) corresponds with a first active region(A1,B1), wherein the first active region is connected to gates of a first PMOS transistor and a first NMOS transistor. A second auxiliary active region(ACR1) corresponds with a second active region(A2,B2), wherein the second active region is connected to gates of a second PMOS transistor and a second NMOS transistor. An auxiliary pattern(20) is positioned between the first and the second auxiliary active regions, and is varied as the position corresponding to misalignment between the transistor and the gate pattern.
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