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SEMICONDUCTOR DEVICE WITH REDUCED PARASITIC CAPACITANCE OF PAD TO IMPROVE INPUT IMPEDANCE CHARACTERISTIC WHEN HIGH FREQUENCY SIGNAL IS INPUTTED OR OUTPUTTED IN ANALOG INTEGRATED CIRCUIT
SEMICONDUCTOR DEVICE WITH REDUCED PARASITIC CAPACITANCE OF PAD TO IMPROVE INPUT IMPEDANCE CHARACTERISTIC WHEN HIGH FREQUENCY SIGNAL IS INPUTTED OR OUTPUTTED IN ANALOG INTEGRATED CIRCUIT
PURPOSE: A semiconductor device with reduced parasitic capacitance of a pad is provided to improve an input impedance characteristic when a high frequency signal is inputted/outputted in an analog integrated circuit by reducing parasitic capacitance formed between an input/output pad and a ground. CONSTITUTION: A field oxide layer(74), the first insulation layer(76), the first metal layer, an interlayer dielectric(78), the second metal layer(80), a passivation layer(82) and an input/output pad(84) are sequentially stacked on a semiconductor substrate(70) of the first conductivity type. The first metal layer is not formed under the input/output pad. An impurity region which is of the second conductivity type and is electrically floated is formed in the vicinity of the surface of the semiconductor substrate corresponding to the input/output pad.
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