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SEMICONDUCTOR MEMORY DEVICE FOR DIRECT ACCESS MODE TEST AND METHOD THEREOF, ESPECIALLY USING LATCHED DATA ERROR IN DIRECT ACCESS MODE TEST
SEMICONDUCTOR MEMORY DEVICE FOR DIRECT ACCESS MODE TEST AND METHOD THEREOF, ESPECIALLY USING LATCHED DATA ERROR IN DIRECT ACCESS MODE TEST
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机译:直接访问模式测试的半导体存储器设备及其方法,特别是在直接访问模式测试中使用锁存的数据错误
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摘要
PURPOSE: A semiconductor memory device for a direct access mode test and method of the direct access mode test are provided to remove an error from pass/fail information by detecting defective data using data latched during the direct access mode test operation. CONSTITUTION: A data expansion unit(380) obtains expanded M-bit output data from N-bit input data. A data selector(310) selectively outputs the M-bit data outputted from the data expansion unit and the data outputted from a predetermined input pipeline. An input data memory latches the N-bit data from an external tester. A memory core(35) stores the M-bit data from the data expansion unit or the input pipeline. A plural output pipelines convert the M-bit data to series data. A comparator compares multi-bit data from the output pipelines and outputs a first and second comparison signals. A latch output pipeline converts the latched N-bit data to series data and outputs the result in response to a test read enable signal. An error detector logically combines the first and second comparison signals and the series latch data and outputs an error determination signal based on the combined result.
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