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METHOD OF MANUFACTURING FLASH CELL FOR PREVENTING GENERATION OF DEFECTS IN POSTPROCESS BY USING NITRIDE-LAYER HARD MASK TO REMOVE ONO FROM SIDEWALL

机译:利用氮化层硬膜去除侧墙中的小野的方法,制造用于防止后处理中产生缺陷的闪存单元的方法

摘要

PURPOSE: A method of manufacturing a flash cell is provided to prevent generation of defects in a postprocess by using a nitride-layer hard mask to remove an ONO from a sidewall. CONSTITUTION: A floating gate(20) is formed on a semiconductor substrate(10). An ONO(30) is deposited thereon. A nitride layer is deposited thereon. A photoresist is masked only on a cell area. A nitride hard mask is formed by etching the nitride layer of a logic area. The ONO of the logic area and the floating gate of the logic area are exposed by the nitride head mask. The ONO of the logic area and the floating gate of the logic area are removed therefrom.
机译:目的:提供一种制造快速单元的方法,以通过使用氮化物层硬掩模从侧壁去除ONO来防止在后处理中产生缺陷。组成:浮栅(20)形成在半导体衬底(10)上。在其上沉积ONO(30)。在其上沉积氮化物层。光致抗蚀剂仅在单元区域上被掩模。通过蚀刻逻辑区域的氮化物层来形成氮化物硬掩模。逻辑区域的ONO和逻辑区域的浮栅被氮化物头掩模暴露。从中去除逻辑区域的ONO和逻辑区域的浮栅。

著录项

  • 公开/公告号KR20050005678A

    专利类型

  • 公开/公告日2005-01-14

    原文格式PDF

  • 申请/专利权人 DONGBUANAM SEMICONDUCTOR INC.;

    申请/专利号KR20030045700

  • 发明设计人 KOH KWAN JU;

    申请日2003-07-07

  • 分类号H01L27/115;

  • 国家 KR

  • 入库时间 2022-08-21 22:06:03

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