首页> 外国专利> METHOD FOR FORMING BITLINE TO GUARANTEE CONTACT MARGIN IN FORMING SUBSEQUENT STORAGE NODE CONTACT

METHOD FOR FORMING BITLINE TO GUARANTEE CONTACT MARGIN IN FORMING SUBSEQUENT STORAGE NODE CONTACT

机译:在形成后续存储节点接触中形成保证接触的保证金的位线的方法

摘要

PURPOSE: A method for forming a bitline is provided to guarantee a contact margin in forming a subsequent storage node contact by minimizing a loss of a SiON layer and a silicon nitride layer in a bitline etch process. CONSTITUTION: A tungsten layer, a silicon nitride layer(13a) and a SiON layer are sequentially formed on a semiconductor substrate(10). A photoresist layer pattern is formed on the SiON layer to cover a metal interconnection region. By using the photoresist layer pattern as a mask, SF6 and N2 gas of a plasma state is supplied to the front surface of the substrate to firstly etch the SiON layer. The photoresist layer pattern is eliminated. By using the residual SiON layer after the first etch process and the silicon nitride layer as a mask, Cl2 and NF3 gases of a plasma state are supplied to the front surface of the resultant structure and the tungsten layer is secondly etched to form a metal interconnection.
机译:目的:提供一种形成位线的方法,以通过在位线蚀刻工艺中使SiON层和氮化硅层的损失最小化来保证形成后续存储节点接触时的接触裕度。组成:在半导体衬底(10)上依次形成钨层,氮化硅层(13a)和SiON层。在SiON层上形成光致抗蚀剂层图案以覆盖金属互连区域。通过使用光致抗蚀剂层图案作为掩模,将等离子体状态的SF 6和N 2气体供应到基板的前表面,以首先蚀刻SiON层。去除了光致抗蚀剂层图案。通过在第一蚀刻工艺之后使用残留的SiON层和氮化硅层作为掩模,将等离子体状态的Cl2和NF3气体供应到所得结构的前表面,然后第二蚀刻钨层以形成金属互连。

著录项

  • 公开/公告号KR20050006504A

    专利类型

  • 公开/公告日2005-01-17

    原文格式PDF

  • 申请/专利权人 HYNIX SEMICONDUCTOR INC.;

    申请/专利号KR20030046343

  • 发明设计人 LEE JU HEE;NAM KI WON;

    申请日2003-07-09

  • 分类号H01L21/28;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:59

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