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ROW DECODER STRUCTURE FOR IMPROVING LAYOUT OF REPEATEDLY ARRANGED PRE-DECODED SIGNAL LINES, SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH THE SAME AND METHOD FOR THE SAME, ESPECIALLY DRASTICALLY REDUCING NUMBER OF SIGNALS
ROW DECODER STRUCTURE FOR IMPROVING LAYOUT OF REPEATEDLY ARRANGED PRE-DECODED SIGNAL LINES, SEMICONDUCTOR MEMORY DEVICE PROVIDED WITH THE SAME AND METHOD FOR THE SAME, ESPECIALLY DRASTICALLY REDUCING NUMBER OF SIGNALS
PURPOSE: A row decoder structure for improving the layout of repeatedly arranged pre-decoded signal lines, a semiconductor memory device provided with the same and a method for the same are provided to drastically reduce the number of signals supplied to the word line decoders and the source line decoders in common. CONSTITUTION: A row decoder structure for improving the layout of repeatedly arranged pre-decoded signal lines includes a global decoder(420), a plurality of word line decoders(431,441,451) and a plurality of source line decoders(435,445,455). The global decoder generates the segment active signals corresponding to the plurality of the segments. The plurality of word line decoders generates the word line active signals by decoding the minimum memory block selection signals and the word line selection signals among the segment active signals and the memory block selection signals. And, the plurality of source line decoders outputs the source line power signal by decoding the source line selection signal among the segment active signals, the minimum memory block selection signal and the memory block selection signals.
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