首页> 外国专利> METHOD FOR FABRICATING SEMICONDUCTOR DEVICE TO CONTROL GENERATION OF METALLIC POLYMER CAUSED BY LOSS OF UPPER ELECTRODE IN ETCH PROCESS OF INSULATION LAYER AND PREVENT BRIDGE BETWEEN UPPER AND LOWER ELECTRODES OF CAPACITOR OF MIM STRUCTURE

METHOD FOR FABRICATING SEMICONDUCTOR DEVICE TO CONTROL GENERATION OF METALLIC POLYMER CAUSED BY LOSS OF UPPER ELECTRODE IN ETCH PROCESS OF INSULATION LAYER AND PREVENT BRIDGE BETWEEN UPPER AND LOWER ELECTRODES OF CAPACITOR OF MIM STRUCTURE

机译:一种制造半导体器件的方法,以控制因绝缘层上,下电极之间绝缘层和上桥之间的绝缘层和上桥之间的绝缘过程中上电极的丢失而引起的金属聚合物的生成

摘要

A kind of purpose: method, it is arranged to prevent a bridge for manufacturing semiconductor device, it is between the upper/lower electrode of a capacitor of MIM (metal insulator metal) structure, by being interconnected to form insulating layer in lower metal, by forming identical tungsten bolt in the parts MIM as connecting part and upper electrode by using tungsten bolt as MIM capacitor in a lower part metal phase. Construction: it includes the parts MIM that semi-conductive substrate (10), which is produced it, and the capacitor and a lower part metal phase for being used to form a MIM structure connect part, is used to form lower metal interconnection (14). A metal layer, an arc (anti-reflection coating) (16) and an insulating layer (18) are sequentially deposited on substrate. One patterning process will carry out leaving insulating layer in the parts MIM only by an etch process, use the first photoresist mode. Metal layer carries out one etch process of patterning, so that a lower electrode is formed in the parts MIM, lower metal, which is interconnected to form, is connected with each other part in lower metal. By using an etch process of third photoresist mode, a layer insulation (24), which is deposited and patterned, to be made insulating layer exposure to the parts MIM and arc exposure is made to be connected with each other part to lower metal, so that a contact hole is formed. A metal material, which is deposited to fill a vacancy contact hole and be planarized to one upper electrode of form, forms a metal plug (30) in the parts MIM and in lower metal interconnection part.
机译:一种目的:方法,被布置为防止用于制造半导体器件的桥,其通过互连以在下部金属中形成绝缘层而位于MIM(金属绝缘体金属)结构的电容器的上/下电极之间,通过在下部金属相中将钨螺栓用作MIM电容器,在作为连接部件的MIM部分和上部电极中形成相同的钨螺栓。结构:包括MIM部件,该MIM部件由半导体衬底(10)制成,电容器和下部金属相用于形成MIM结构连接部件,用于形成下部金属互连(14 )。在基板上依次沉积金属层,电弧(抗反射涂层)(16)和绝缘层(18)。使用第一光致抗蚀剂模式,仅通过蚀刻工艺将仅在部分MIM中进行绝缘层的构图。金属层执行一次构图的蚀刻工艺,从而在部分MIM中形成下部电极,互连形成的下部金属在下部金属中彼此连接。通过使用第三光致抗蚀剂模式的蚀刻工艺,沉积和图案化的层绝缘体(24)将被形成为绝缘层暴露于部件MIM,而电弧暴露被彼此连接至下部金属,因此形成接触孔。沉积以填充空位接触孔并被平坦化成一个上电极形式的金属材料在部件MIM和下部金属互连部件中形成金属塞(30)。

著录项

  • 公开/公告号KR20050009896A

    专利类型

  • 公开/公告日2005-01-26

    原文格式PDF

  • 申请/专利权人 MAGNACHIP SEMICONDUCTOR LTD.;

    申请/专利号KR20030049250

  • 发明设计人 RYU SANG WOOK;

    申请日2003-07-18

  • 分类号H01L27/10;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:56

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