首页> 外国专利> SEMICONDUCTOR DEVICE CAPABLE OF PREVENTING DEGRADATION DUE TO HARDMASK ON GATE ELECTRODE BY USING HARDMASK HAVING LAMINATED STRUCTURE OF SILICON LAYER/DIELECTRIC LAYER OR SILICON OXIDE LAYER/DIELECTRIC LAYER AND FORMING METHOD THEREOF

SEMICONDUCTOR DEVICE CAPABLE OF PREVENTING DEGRADATION DUE TO HARDMASK ON GATE ELECTRODE BY USING HARDMASK HAVING LAMINATED STRUCTURE OF SILICON LAYER/DIELECTRIC LAYER OR SILICON OXIDE LAYER/DIELECTRIC LAYER AND FORMING METHOD THEREOF

机译:通过使用具有硅层/介电层或硅氧化物层/介电层的层状结构的硬质合金,能够防止栅极电极上的硬质合金劣化的半导体装置及其形成方法

摘要

Purpose: semiconductor device, it can prevent the hardmask degenerated due on a gate electrode, it is arranged to reduce mechanical stress formation hardmask with its method of forming, there is one silicon layer/dielectric layer or one silicon oxide layer/dielectric layer layer structure. Construction: a gate insulating layer (31) is formed in a upper surface of semi-conductive substrate (30). One gate electrode (32) is formed in a upper surface of gate insulating layer. One silicon layer (33A) and a dielectric layer (33B) are sequentially laminated on a upper surface of gate electrode. One silicon oxide layer is formed between gate electrode and silicon layer. Gate electrode is formed by stacking the first diffusion barrier (32B), a polysilicon layer (32A), a tungsten layer (32C) and the second diffusion barrier (32D).
机译:目的:半导体器件,它可以防止硬掩模在栅电极上退化,其布置方法可以减少形成硬掩模的机械应力,它具有一层硅层/电介质层或一层氧化硅层/电介质层结构。构造:在半导体衬底(30)的上表面中形成栅绝缘层(31)。在栅绝缘层的上表面形成有一个栅电极(32)。在栅电极的上表面上依次层叠一个硅层(33A)和电介质层(33B)。在栅电极和硅层之间形成一层氧化硅层。通过堆叠第一扩散阻挡层(32B),多晶硅层(32A),钨层(32C)和第二扩散阻挡层(32D)来形成栅电极。

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