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STRUCTURE OF PASSIVATION LAYER OF SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF TO REDUCE DELAY OF TIME CONSTANT CAUSED BY REDUCTION OF CAPACITANCE AND EMBODY EXCELLENT GAP-FILL PERFORMANCE WITHOUT VOID WHEN DESIGN RULE IS DECREASED
STRUCTURE OF PASSIVATION LAYER OF SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF TO REDUCE DELAY OF TIME CONSTANT CAUSED BY REDUCTION OF CAPACITANCE AND EMBODY EXCELLENT GAP-FILL PERFORMANCE WITHOUT VOID WHEN DESIGN RULE IS DECREASED
Purpose: a structure setting of a passivation layer of semiconductor device is at the postponement for reducing the time constant as caused by the reduction of capacitor and embodies excellent none gap of performance of filling a vacancy when monoxide substance reduction of the design rule by using FSG (fluorinated silicate glass) as a passivation layer. Construction: a FSG layers (13) is formed in a substrate (11), with multiple metal interconnections (12). One ion barrier layer (14) is formed in FSG layers. One silicon nitride layer (15) is formed in ion barrier layer. Ion barrier layer is made of a kind of BPSG (boron-phosphorosilicate glass) materials or a kind of PSG (silicate glass of phosphorus) material.
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