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COMPLEMENTARY DIVISION MASK HAVING ALIGNMENT MARK, METHOD FOR FORMING ALIGNMENT MARK OF THE COMPLEMENTARY DIVISION MASK, SEMICONDUCTOR DEVICE MANUFACTURED BY USING THE COMPLEMENTARY DIVISION MASK, AND ITS MANUFACTURING METHOD
COMPLEMENTARY DIVISION MASK HAVING ALIGNMENT MARK, METHOD FOR FORMING ALIGNMENT MARK OF THE COMPLEMENTARY DIVISION MASK, SEMICONDUCTOR DEVICE MANUFACTURED BY USING THE COMPLEMENTARY DIVISION MASK, AND ITS MANUFACTURING METHOD
Conventionally, a plurality of complementary division masks having an alignment mark are used to manufacture a semiconductor having patterns of layers, frequently causing misaligment of the layers. According to the invention, division alignment marks (M1a, M2a, M3a, M4a) are formed in complementary division areas corresponding to the respective complementary division masks (B1, B2, B3, B4) produced by dividing a stencil mask. By apportioning the alignment marks to the complementary division masks, the misalignments of the masks are averaged, thereby providing a semiconductor device free of much misalignment between the patterns of adjacent layers.
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