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PERFORMANCE IMPROVEMENT APPARATUS FOR HARDWARE-ASSISTED VERIFICATION USING MASSIVE MEMORY AND COMPILATION AVOIDANCE AND ITS VERIFICATION METHOD USING THE SAME
PERFORMANCE IMPROVEMENT APPARATUS FOR HARDWARE-ASSISTED VERIFICATION USING MASSIVE MEMORY AND COMPILATION AVOIDANCE AND ITS VERIFICATION METHOD USING THE SAME
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机译:大量记忆和编译避免的硬件辅助验证性能改进装置及其验证方法
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摘要
The present invention relates to a device design verification and validation method using the same for the design verification of the millions of gate-level digital system, designed more.; In the present invention, certain parts of the design verification target circuit design is modified to enable the dynamic information exchange between the design objects in causing the design verification system software of the present invention to be performed on any computer design verification target circuit hardware platform quickly transferred from the simulator thereby enables the rapid design verification. In addition, the design verification interface module of the present invention by a built-in large-capacity memory while minimizing the overhead of the test bench makes it possible to design validation.
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