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High Resolution Multi-Phase Clock Generator Based On Array Of Delay Locked Loops
High Resolution Multi-Phase Clock Generator Based On Array Of Delay Locked Loops
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机译:基于延迟锁定环阵列的高分辨率多相时钟发生器
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摘要
The present invention relates to an array-structured high-resolution multi-phase clock generator of which time-resolution is shorter than a delay time of a delay cell. The present multi-phase clock generator can have arbitrary number of delay cells in a main delay-locking loop and in an auxiliary delay-locking loop. Moreover, the present multi-phase clock generator can generates 2n multi-phase clocks.
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