METHOD AND DEVICE FOR IMPROVING LOCKING AND SYNCHRONIZATION CHARACTERISTICS FOR PHASE-LOCKED LOOPS

摘要

FIELD: phase-locked loops.;SUBSTANCE: proposed method includes error detection in phase-locked loop for which purpose first bias error signal, quadrature error signal, and second bias error signal are generated, and PLL error is found using second bias error signal. PLL has demodulator, amplifier, integrator, adder, second integrator, and feedback circuit.;EFFECT: improved locking characteristics of phase-locked loop, eliminated false synchronization.;14 cl, 7 dwg