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Testing and control process for electronic chips such as logic or memory chips individually compares test data with identifying unit and operates command block or deactivates failures
Testing and control process for electronic chips such as logic or memory chips individually compares test data with identifying unit and operates command block or deactivates failures
A testing and control process for electronic chips comprises comparing command block (101) test data currents with identification units (106a-n), activating the circuits (105a-n) where the data corresponds, rough working at least one command block (102a-k) in the circuit and deactivating circuits having non-corresponding data. An independent claim is also included for a test circuit for the above process.
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