首页> 外国专利> Semiconductor memory has leakage controller to reduce charge transfer between storage circuit and bit line, before reading data from memory cell and storage circuit to generate read voltage for read circuit, based on stored data

Semiconductor memory has leakage controller to reduce charge transfer between storage circuit and bit line, before reading data from memory cell and storage circuit to generate read voltage for read circuit, based on stored data

机译:半导体存储器具有泄漏控制器,可在从存储单元和存储电路读取数据以基于存储的数据生成用于读取电路的读取电压之前,减少存储电路与位线之间的电荷转移

摘要

A controller controls charge transferability of charge transferring circuit to transfer charge read out from a storage circuit, based on change in bit line voltage. A leakage controller reduces charge transfer between storage circuit and bit line, before reading data from the cell. The storage circuit generates read voltage for read circuit, based on logical value of the stored data.
机译:控制器控制电荷转移电路的电荷转移能力,以基于位线电压的变化转移从存储电路读出的电荷。在从单元读取数据之前,泄漏控制器可减少存储电路与位线之间的电荷转移。存储电路基于所存储的数据的逻辑值生成用于读取电路的读取电压。

著录项

  • 公开/公告号DE102005010796A1

    专利类型

  • 公开/公告日2005-11-10

    原文格式PDF

  • 申请/专利权人 FUJITSU LTD. KAWASAKI;

    申请/专利号DE20051010796

  • 申请日2005-03-07

  • 分类号G11C7/06;G11C11/22;G11C7/12;G11C7/04;G11C11/4091;

  • 国家 DE

  • 入库时间 2022-08-21 22:00:38

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