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Data processing system with a digital signal processor and a coprocessor and data processing method

机译:具有数字信号处理器和协处理器的数据处理系统以及数据处理方法

摘要

A data processing system includes a digital signal processor core (110) and a co-processor (140). The co-processor (140) has a local memory (141, 145, 147) within the address space of the said digital signal processor core (110). The co-processor (140) responds commands from the digital signal processor core (110). A direct memory access circuit (120) autonomously transfers data to and from the local memory (141, 145, 147) of the co-processor (140). Co-processor commands are stored in a command FIFO memory (141) mapped to a predetermined memory address. Control commands includes a receive data synchronism command stalling the co-processor (140) until completion of a memory transfer into the local memory (141, 145, 147). A send data synchronism command causes the co-processor (140) to signal the direct memory access circuit (120) to trigger memory transfer out of the local memory (141, 145, 147). An interrupt command causes the co-processor (140) to interrupt the digital signal processor core (110).
机译:数据处理系统包括数字信号处理器核(110)和协处理器(140)。协处理器(140)在所述数字信号处理器核(110)的地址空间内具有本地存储器(141、145、147)。协处理器(140)响应来自数字信号处理器核心(110)的命令。直接存储器访问电路(120)自主地将数据传输到协处理器(140)的本地存储器(141、145、147)或从本地处理器(141、145、147)传输数据。协处理器命令存储在映射到预定存储器地址的命令FIFO存储器(141)中。控制命令包括接收数据同步命令,该命令使协处理器(140)停顿直到完成向本地存储器(141、145、147)的存储器传输。发送数据同步命令使协处理器(140)向直接存储器访问电路(120)发信号,以触发存储器从本地存储器(141、145、147)的转移。中断命令使协处理器(140)中断数字信号处理器核(110)。

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