首页> 外国专利> Method of manufacture of a circuit integrated comprising bipolar transistors, in particular a heterojunction if / sige, and a field effect transistors has gates isolated, and the corresponding circuit integrated

Method of manufacture of a circuit integrated comprising bipolar transistors, in particular a heterojunction if / sige, and a field effect transistors has gates isolated, and the corresponding circuit integrated

机译:包括双极晶体管,特别是异质结if / sige的集成电路的制造方法以及场效应晶体管具有隔离的栅极的方法,并且集成了相应的电路

摘要

When the fabrication of the insulated gate field effect transistor is started, then the bipolar transistor (BIP1,BIP2) is totally fabricated, before the resumption of fabrication of the insulated gate field effect transistor (MOS), and the step of common finishing of the two transistors is executed, including the common thermal reheating treatment (122) and common silication treatment.
机译:当开始制造绝缘栅场效应晶体管时,在恢复制造绝缘栅场效应晶体管(MOS)之前,必须先完成双极晶体管(BIP1,BIP2)的整体制造,并完成共同的步骤。执行两个晶体管,包括常规的热再热处理(122)和常规的硅化处理。

著录项

  • 公开/公告号FR2835652B1

    专利类型

  • 公开/公告日2005-04-15

    原文格式PDF

  • 申请/专利权人 STMICROELECTRONICS SA;

    申请/专利号FR20020001305

  • 发明设计人 MARTY MICHEL;CHANTRE ALAIN;

    申请日2002-02-04

  • 分类号H01L21/8249;

  • 国家 FR

  • 入库时间 2022-08-21 21:58:35

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号