首页> 外国专利> Dummy surface inserting method for e.g. very large scale integrated circuit, involves processing circuit design by insertion of surface patterns based on insertion hierarchy estimating design hierarchy by processing blocks and units

Dummy surface inserting method for e.g. very large scale integrated circuit, involves processing circuit design by insertion of surface patterns based on insertion hierarchy estimating design hierarchy by processing blocks and units

机译:虚拟表面插入方法,例如超大规模集成电路,涉及通过基于插入层次的表面图案的插入来处理电路设计,并通过处理块和单元来估计设计层次

摘要

The method involves processing integrated circuit design, layer by layer, by selective insertion of patterns of dummy surfaces according to an insertion hierarchy. The insertion hierarchy estimates design hierarchy of the circuit by individual processing of blocks (30) and interconnected units (2) and their interconnection routing. The patterns are selectively established based on methods used for design of the blocks (30). An independent claim is also included for a system of designing an integrated circuit.
机译:该方法涉及通过根据插入层次结构选择性地插入虚拟表面的图案来逐层处理集成电路设计。插入层级通过块(30)和互连单元(2)的单独处理及其互连路由来估计电路的设计层级。基于用于块(30)的设计的方法来选择性地建立图案。还包括针对设计集成电路的系统的独立权利要求。

著录项

  • 公开/公告号FR2866963A1

    专利类型

  • 公开/公告日2005-09-02

    原文格式PDF

  • 申请/专利权人 BULL SA;

    申请/专利号FR20040002011

  • 发明设计人 ZORRILLA MARTA;BLANCHARD VIVIAN;

    申请日2004-02-27

  • 分类号G06F17/50;H01L21/822;

  • 国家 FR

  • 入库时间 2022-08-21 21:58:13

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