首页> 外国专利> Automated method for the hierarchical and selective insertion of dummy surfaces into the physical design of a multilayer integrated circuit

Automated method for the hierarchical and selective insertion of dummy surfaces into the physical design of a multilayer integrated circuit

机译:用于将虚设表面分层有选择地插入到多层集成电路的物理设计中的自动化方法

摘要

The invention relates to an automated method for inserting dummy surfaces (95) into the various layers of the physical design (121) of multilayer integrated circuits organized in interconnected units (2) containing interconnected blocks (30) composed of interconnected cells (3), implemented by an integrated circuit design system (100). The multilayer integrated circuit design (121), stored in the design system (100) is implemented layer by layer, through selective insertion of patterns of dummy surfaces (95), the selective insertion is based on an insertion hierarchy that respects the hierarchy of the physical design (121) of the integrated circuits, by means of individual implementation of the interconnected blocks (30) and first interconnection routing (31) for said interconnected blocks (30) and individual implementation of the interconnected units (2) and second interconnection routing (22) for said interconnected units (2). The patterns of dummy surfaces are established selectively in accordance with the design of the blocks (30) of the integrated circuit.
机译:本发明涉及一种用于将虚设表面( 95 )插入以互连单元( 121 )的各个层中的自动化方法。 > 2 )包含由互连单元( 3 )组成的互连块( 30 ),由集成电路设计系统( 100 实现) >)。存储在设计系统( 100 )中的多层集成电路设计( 121 )通过有选择地插入虚拟表面的图案( 95)逐层实现),选择性插入基于插入层次结构,该层次结构通过互连块(的单独实现)尊重集成电路的物理设计( 121 )的层次结构> 30 )和所述互连块( 30 )的第一互连路由( 31 )以及互连单元的独立实现( 2 >)和所述互连单元( 2 )的第二互连路由( 22 )。根据集成电路块( 30 )的设计,选择性地建立虚拟表面的图案。

著录项

  • 公开/公告号US2008127025A1

    专利类型

  • 公开/公告日2008-05-29

    原文格式PDF

  • 申请/专利权人 MARTA ZORRILLA;VIVIAN BLANCHARD;

    申请/专利号US20080007678

  • 发明设计人 MARTA ZORRILLA;VIVIAN BLANCHARD;

    申请日2008-01-14

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 20:13:49

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