A MOS USB driver with linear output impedance and having PVT compensation

摘要

A USB driver comprises parallel NMOS driver transistors 38 and 42, the impedances of which vary complementarily to maintain the impedance at the common drain node relatively invariant with drain voltage. High gate drive voltages for 38 and 42 further improve impedance linearity. The PVT spread of the series resistor 22 and the transistors is accommodated. The technique allows relaxation of the requirements of voltage and current references in the driver and permits accurate impedance control even when an internal precision resistor is unavailable.