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Integrated circuit comprising an SSTL (stub series terminated logic) pre-driver stage using regulated power supply and method for performing an SSTL operation
Integrated circuit comprising an SSTL (stub series terminated logic) pre-driver stage using regulated power supply and method for performing an SSTL operation
A SSTL memory interface pre-driver stage (24) that uses a voltage regulator (32) to generate "virtual" supply and ground voltages is provided. The "virtual" supply, being lower than a power supply voltage of the pre-driver stage (24), and the "virtual" pound voltage, being greater than a zero volt ground voltage, allows low voltage transistors to be used, thereby improving interface performance and decreasing system power consumption. The pre-driver stage (24) uses a biasing circuit (30) to bias the voltage regulator (32), formed by a transistor arranged in a source follower configuration, to generate the "virtual" supply and ground voltages off which a voltage translator stage (36) of the pre-driver stage operates to generate an output of the pre-driver stage (24).
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