TIMING MODEL, AND LSI DESIGN METHOD USING IT

摘要

PPROBLEM TO BE SOLVED: To provide a method for efficiently designing an LSI including a functional block by use of a timing model having two kinds of modes of ideal clock condition and propagation clock condition. PSOLUTION: The LSI design method using a functional block containing a plurality of flip-flops comprises steps of preparing a timing model usable in a first mode and in a second mode; performing functional design of elementary function containing one or more function blocks; performing logic synthesis for the elementary function determined by the functional design by use of the timing model of the functional block in the first mode; performing first timing analysis for the logically synthesized elementary function by using the timing model in the first mode; performing layout based on the result of the logic synthesis and the first timing analysis; and performing a second timing analysis by using the timing model in the second mode after the layout. PCOPYRIGHT: (C)2006,JPO&NCIPI