首页> 外国专利> IMPROVED METHOD OF FORMING BOTTOM-GATE THIN-FILM TRANSISTOR BY USING BLENDED SOLUTION TO FORM SEMICONDUCTOR LAYER AND INSULATING LAYER

IMPROVED METHOD OF FORMING BOTTOM-GATE THIN-FILM TRANSISTOR BY USING BLENDED SOLUTION TO FORM SEMICONDUCTOR LAYER AND INSULATING LAYER

机译:通过混合溶液形成半导体层和绝缘层的改进方法来形成底部栅极薄膜晶体管

摘要

PROBLEM TO BE SOLVED: To form a polymer layer and seal the layer in an electronic device.;SOLUTION: In a method of forming a semiconductive polymer layer protected by an insulating polymer layer, materials for forming a semiconductive polymer and an insulating polymer are dissolved in a solvent. When a blended solution is deposited on a substrate, the semiconductive polymer and the insulating polymer are separated. When the solvent is vaporized, a semiconductive material forms an active area of a TFT and the insulating polymer minimizes the exposure of the semiconductive polymer to the air.;COPYRIGHT: (C)2006,JPO&NCIPI
机译:解决的问题:在电子设备中形成聚合物层并将其密封。解决方案:在形成受绝缘聚合物层保护的半导体聚合物层的方法中,用于形成半导体聚合物和绝缘聚合物的材料要溶解在溶剂中。当将混合溶液沉积在基板上时,半导体聚合物和绝缘聚合物分离。当溶剂蒸发时,半导体材料形成TFT的有源区域,绝缘聚合物使半导体聚合物在空气中的暴露最小化。;版权所有:(C)2006,JPO&NCIPI

著录项

  • 公开/公告号JP2006013492A

    专利类型

  • 公开/公告日2006-01-12

    原文格式PDF

  • 申请/专利权人 PALO ALTO RESEARCH CENTER INC;

    申请/专利号JP20050178743

  • 发明设计人 ARIAS ANA C;

    申请日2005-06-20

  • 分类号H01L29/786;H01L21/336;H01L51/05;H01L21/312;

  • 国家 JP

  • 入库时间 2022-08-21 21:56:00

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