首页> 外国专利> Preparing for the matrix operation device and the digital signal processor null digital signal processor which

Preparing for the matrix operation device and the digital signal processor null digital signal processor which

机译:为矩阵运算设备和数字信号处理器准备零数字信号处理器,其中

摘要

A digital signal processor capable of performing matrix operations, by which it is possible to use a method of matrix representation for the instruction level of the digital signal processor in order to effectively process a large amount of data, is provided. An apparatus included in the digital signal processor, for performing matrix operations, includes a data storage unit for storing operand data including matrix data in the form of a circular linked list and operation result data, an address generating unit for sequentially generating addresses required for performing matrix operations, the addresses including a series of addresses of first operand data, a series of addresses of second operand data, and a series of stored addresses of operation result data, whereby the addresses are sequentially generated according to the contents of the instruction words performed by the digital signal processor, and an operation unit for reading data positioned in the address generated by the data storage unit and performing operations according to the contents of the instruction words. It is possible to reduce the size of the program memory in the digital signal processor by providing a measure for effectively representing a digital signal processing algorithm. Accordingly, it is possible to reduce power consumption for reading the program memory, to thus allow electronic goods to be operated for a long time with small power consumption.
机译:提供了一种能够执行矩阵运算的数字信号处理器,通过该矩阵信号,可以将矩阵表示的方法用于数字信号处理器的指令级,以便有效地处理大量数据。数字信号处理器中包括的用于执行矩阵运算的设备包括:数据存储单元,用于存储操作数数据,该操作数数据包括以循环链接列表形式的矩阵数据和运算结果数据;地址生成单元,用于顺序地生成执行运算所需的地址。矩阵运算,其地址包括一系列第一操作数数据的地址,一系列第二操作数数据的地址以及一系列存储的运算结果数据的地址,从而根据执行的指令字的内容顺序生成这些地址所述数字信号处理器包括操作单元,所述操作单元用于读取位于由数据存储单元生成的地址中的数据,并根据指令字的内容进行操作。通过提供一种有效表示数字信号处理算法的措施,可以减小数字信号处理器中程序存储器的大小。因此,可以减少用于读取程序存储器的功耗,从而允许以小功耗长时间操作电子商品。

著录项

  • 公开/公告号JP3819686B2

    专利类型

  • 公开/公告日2006-09-13

    原文格式PDF

  • 申请/专利权人 三星電子株式会社;

    申请/专利号JP20000260459

  • 发明设计人 張 虎 郎;趙 振 国;朴 賢 宇;

    申请日2000-08-30

  • 分类号G06F17/16;G06F9/34;

  • 国家 JP

  • 入库时间 2022-08-21 21:52:07

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