Soft-output decoding apparatus and soft-output decoding method, and decoding apparatus and decoding method

摘要

PPROBLEM TO BE SOLVED: To perform optimum quantization that does not degrade performance and does not increase a circuit scale. PSOLUTION: A log-sum arithmetic circuit 100 in a soft output decoding circuit for performing soft output decoding is provided with a selection circuit 104 for selecting data corresponding to a maximum likelihood path which is the path of the highest likelihood from two or more pieces of the data corresponding to a plurality of paths reaching respective states, a correction term calculation circuit 105 for calculating a correction term and an adder 106 for adding the data selected by the selection circuit 104 and the correction term calculated by the correction term calculation circuit 105. The log-sum arithmetic circuit 100 performs log-sum computation by using a logarithmic likelihood whose quantization notch width is Δ=d that is required at computation inside a soft output decoder, and the computed result to the quantization notch width Δ=2SPn/SPd that is required at input and output of the data from/to the outside and that is coarser than the quantization notch width Δ=d. PCOPYRIGHT: (C)2003,JPO