The basic concept of the present invention is that in order to divide into smaller independent segments bus by opening the switch / close, to add the switches along the bus. A plurality of clusters, each of which has one functional unit the (FU) and (C1~C6), clustered instruction level parallel processor is, to connect the (C1~C6) said cluster register file at least one (RF) and at least and a (100) bus means, the bus (100), switching means (100a, 100b, 100c) and bus segments, are arranged (100a, 100b, 100c) between bus adjacent segments I have a (200). (200) is used to connect or disconnect (100a, 100b, 100c) bus segment adjacent to said switching means. In addition, how to access bus clustered instruction level parallel processor in (100) is shown. The bus (100) has a (200) switching means at least one direction (100) of the bus. Cluster, can be carried a receive operation based on the transfer word and specify the source register or send operation, based on the transfer word and source register. Then closed / the switching means is opened in accordance with the transfer word.
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