The basic idea of the invention is to add switches along a bus, in order divide the bus into smaller independent segments by opening/closing said switches. A clustered Instruction Level Parallelism processor comprises a plurality of clusters (C1-C6) each comprising at least one register file (RF) and at least one functional unit (FU), a bus means (100) for connecting said clusters (C1-C6), wherein said bus (100) comprises a plurality of bus segments (100a, 100b, 100c), and switching means (200), which is arranged between adjacent bus segments (100a, 100b, 100c). Said switching means (200) are used for connecting or disconnecting adjacent bus segments (100a, 100b, 100c). Furthermore, a method for accessing a bus (100) in a clustered Instruction Level Parallelism processor is shown. Said bus (100) comprises at least one switching means (200) along said bus (100). A cluster can either perform a sending operation based on a source register and transfer word or a receiving operation based on a designation source register and a transfer word. Said switching means are then opened/closed according to said transfer word.
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机译：本发明的基本思想是沿总线增加开关，以便通过断开/闭合所述开关将总线分成较小的独立段。集群式指令级并行处理器包括多个集群（C 1 -C 6 ），每个集群包括至少一个寄存器文件（RF）和至少一个功能单元（FU） ），用于连接所述群集（C 1 -C 6 ）的总线装置（ 100 ），其中，所述总线（ 100 < / B>）包括多个总线段（ 100 a ，100 b ，100 < / B> c ）和切换装置（ 200 ），该装置布置在相邻的总线段（ 100 a ，100 b ，100 c ）。所述开关装置（ 200 ）用于连接或断开相邻的总线段（ 100 a ，100 b ，100 c ）。此外，示出了用于在集群式指令级并行处理器中访问总线（ 100 ）的方法。所述总线（ 100 ）包括沿着所述总线（ 100 ）的至少一个开关装置（ 200 ）。集群可以基于源寄存器和传输字执行发送操作，也可以基于指定源寄存器和传输字执行接收操作。然后根据所述转移字打开/关闭所述开关装置。
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