首页> 外国专利> Besides the fact that to be piled up with the cell which is adjacent with the cell which

Besides the fact that to be piled up with the cell which is adjacent with the cell which

机译:除了要与与之相邻的单元格堆积在一起的事实

摘要

PROBLEM TO BE SOLVED: To provide the manufacturing method of a reticle for manufacturing a semiconductor capable of shortening the time required for arranging a cell on a scribe line. SOLUTION: The cell data containing at least the data specifying a cell to be arranged, cell size and a cell arrangement rule and the scribe line net data showing the arrangement of the scribe line are inputted (S1, S2), a free area capable of arranging the cell to be arranged on the scribe line is retrieved based on these data, the cell is arranged in the retrieved free area (S4) and the cell arrangement data according to the arranged result are generated (S5).
机译:解决的问题:提供一种用于制造半导体的掩模版的制造方法,该掩模版的制造方法能够缩短在划线上布置单元所需的时间。解决方案:输入至少包含指定要排列的像元,像元大小和像元排列规则的数据的像元数据以及表示划线的排列的划线网数据(S1,S2),该空白区可以基于这些数据来检索将要在划片线上布置的单元的布置,将单元布置在检索到的自由区域中(S4),并且根据布置结果生成单元布置数据(S5)。

著录项

  • 公开/公告号JP3736034B2

    专利类型

  • 公开/公告日2006-01-18

    原文格式PDF

  • 申请/专利权人 ソニー株式会社;

    申请/专利号JP19970133547

  • 发明设计人 植木 伸一;

    申请日1997-05-23

  • 分类号G03F1/08;H01L21/027;

  • 国家 JP

  • 入库时间 2022-08-21 21:49:16

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