首页> 外国专利> Controllable frequency divider circuit, transmitter/receiver with a controllable frequency divider circuit, and a method for carrying out a loop-back test

Controllable frequency divider circuit, transmitter/receiver with a controllable frequency divider circuit, and a method for carrying out a loop-back test

机译:可控分频器电路,具有可控分频器电路的发送器/接收器以及进行环回测试的方法

摘要

A frequency divider circuit can be utilized for loop-back tests in a transmitter/receiver. In one embodiment, provision is made for a multiplexer to be connected downstream from a frequency divider, whose output side produces signal elements with different phases. The multiplexer is designed to periodically switch its inputs to its output by means of a control signal at its control input. The periodicity of the switching results in a frequency offset with respect to an unswitched signal, by which means a test signal is produced with a difference frequency during frequency conversion. Other systems and methods are also disclosed.
机译:分频器电路可用于发射机/接收机中的环回测试。在一个实施例中规定,将多路复用器连接到分频器的下游,该分频器的输出侧产生具有不同相位的信号元件。多路复用器设计为通过其控制输入端的控制信号定期将其输入切换为输出。切换的周期性导致相对于未切换的信号的频率偏移,由此在频率转换期间以不同的频率产生测试信号。还公开了其他系统和方法。

著录项

  • 公开/公告号US20060233112A1

    专利类型

  • 公开/公告日2006-10-19

    原文格式PDF

  • 申请/专利权人 FRANK DEMMERLE;

    申请/专利号US11387338

  • 发明设计人 FRANK DEMMERLE;

    申请日2006-03-23

  • 分类号H04J3/14;

  • 国家 US

  • 入库时间 2022-08-21 21:48:26

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