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Directory based support for function shipping in a multiprocessor system

机译:对多处理器系统中的函数传送的基于目录的支持

摘要

A multiprocessor system includes a plurality of data processing nodes. Each node has a processor coupled to a system memory, a cache memory, and a cache directory. The cache directory contains cache coherency information for a predetermined range of system memory addresses. An interconnection enables the nodes to exchange messages. A node initiating a function shipping request identifies an intermediate destination directory based on a list of the function's operands and sends a message indicating the function and its corresponding operands to the identified destination directory. The destination cache directory determines a target node based, at least in part, on its cache coherency status information to reduce memory access latency by selecting a target node where all or some of the operands are valid in the local cache memory. The destination directory then ships the function to the target node over the interconnection.
机译:多处理器系统包括多个数据处理节点。每个节点都有一个耦合到系统内存,高速缓存和高速缓存目录的处理器。高速缓存目录包含用于系统内存地址的预定范围的高速缓存一致性信息。互连使节点能够交换消息。发起功能传送请求的节点根据功能操作数的列表标识中间目标目录,并将指示该功能及其相应操作数的消息发送到标识的目标目录。目的高速缓存目录至少部分地基于其高速缓存一致性状态信息来确定目标节点,以通过选择在本地高速缓存存储器中所有或某些操作数均有效的目标节点来减少存储器访问等待时间。然后,目标目录将功能通过互连传递给目标节点。

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