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Phase detector for all-digital phase locked and delay locked loops
Phase detector for all-digital phase locked and delay locked loops
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机译:用于全数字锁相环和延迟锁相环的鉴相器
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摘要
A phase detector is comprised of two cross-coupled gates which are capable of phase discrimination down to a level of approximately 10 picoseconds. An arbiter circuit, responsive to the cross-coupled gates, generates mutually exclusive UP and DOWN pulse signals. The UP and DOWN pulse signals may be filtered and used to control the delay line of an all digital delay locked or phase locked loop.
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