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Tuple propagator and its use in analysis of mixed clock domain designs

机译:元组传播器及其在混合时钟域设计分析中的应用

摘要

Names of signals are propagated through a circuit design inside tuples, with each tuple including at least a signal name and a sequential depth. A tuple being propagated is added to a list of zero or more tuples currently identified with a circuit element, unless a tuple of the same signal name is already present in the list. If already present in the list, then propagation of that tuple is stopped. Propagation of tuples may also be stopped depending on user-defined limits, e.g. on sequential depth. Tuple propagation may be used, depending on the embodiment, to identify features of interest in the circuit design, e.g. (a) a point of convergence of differently clocked signals, (b) location of gray coders, and (c) location of synchronizers, by appropriate identification of circuit elements from which tuple propagation is to start, and by appropriate checks on lists of tuples that result from tuple propagation.
机译:信号名称通过元组内部的电路设计传播,每个元组至少包括信号名称和顺序深度。除非在列表中已经存在具有相同信号名称的元组,否则将被传播的元组添加到当前由电路元件标识的零个或多个元组的列表中。如果列表中已经存在该元组,则将停止该元组的传播。元组的传播也可以根据用户定义的限制(例如,在顺序深度上。取决于实施例,可以使用元组传播来识别电路设计中感兴趣的特征,例如,电路设计。 (a)通过不同的时钟信号的收敛点,(b)格雷码的位置,和(c)同步器的位置,通过适当地识别从其开始元组传播的电路元件,以及通过适当地检查元组列表由元组传播导致的。

著录项

  • 公开/公告号US2005273735A1

    专利类型

  • 公开/公告日2005-12-08

    原文格式PDF

  • 申请/专利权人 ALAIN M. DARGELAS;

    申请/专利号US20040869488

  • 发明设计人 ALAIN M. DARGELAS;

    申请日2004-06-15

  • 分类号G06F17/50;G06F11/00;

  • 国家 US

  • 入库时间 2022-08-21 21:41:32

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