首页> 外国专利> THRESHOLD VOLTAGE NUMERICAL ANALYSIS METHOD FOR SONOS ERASE IN SEMICONDUCTOR

THRESHOLD VOLTAGE NUMERICAL ANALYSIS METHOD FOR SONOS ERASE IN SEMICONDUCTOR

机译:半导体声纳擦除的阈值电压数值分析方法

摘要

PURPOSE: A method for analyzing threshold voltage with a numerical analysis method during a sonos eras process in semiconductor is provided to drastically reduce the period for developing the silicon oxide nitride oxide silicon(SONOS) device, thereby drastically reducing the cost thereof. CONSTITUTION: A method for analyzing threshold voltage with a numerical analysis method during a sonos eras process in semiconductor includes the steps of: calculating the electric field in the tunnel oxide in the time tn by using a first mathematical formula; calculating the amount of change of the program threshold voltage in the silicon oxide nitride oxide silicon(SONOS) device in the time tn by using the electric field in the tunnel oxide layer; and analyzing the threshold voltage numerical value during the SONOS erase process.
机译:目的:提供一种在半导体的共鸣时代过程中利用数值分析方法分析阈值电压的方法,以大大减少开发氧化硅氮氧化物硅(SONOS)器件的时间,从而大大降低其成本。构成:一种在半导体的声波过程中用数值分析方法分析阈值电压的方法,包括以下步骤:利用第一数学公式计算在时间tn内隧道氧化物中的电场;利用所述隧道氧化层中的电场,计算所述时间tn中所述SONOS器件中的编程阈值电压的变化量;在SONOS擦除过程中分析阈值电压数值。

著录项

  • 公开/公告号KR100532752B1

    专利类型

  • 公开/公告日2005-11-30

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20030006857

  • 发明设计人 정진효;이상범;

    申请日2003-02-04

  • 分类号G11C16/14;

  • 国家 KR

  • 入库时间 2022-08-21 21:27:26

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