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Semiconductor memory device having devided input data strobe and output data strobe
Semiconductor memory device having devided input data strobe and output data strobe
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机译:具有划分的输入数据选通和输出数据选通的半导体存储器件
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摘要
PURPOSE: A semiconductor memory device having separated input data strobe and output data strobe is provided to enable read and write data continuously so as to increase the bandwidth of the DDR(Double Data Rate) synchronous memory device. CONSTITUTION: The semiconductor memory device includes the first pad(700), the second pad(710), the third pad(720) and the forth pad(730). The first pad receives an input data strobe signal from outside. The second pad delivers the an output data strobe signal to outside. The third pad receives the input data from outside. The forth pad delivers output data to outside. A global input line for delivering the input data to the memory cell and a global output line to deliver the output data from the memory cell are separated from each other. The DDR(double data rate) synchronous memory device includes the global input line as well as the global output line.
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