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SEMICONDUCTOR MEMORY DEVICE HAVING BUS INTERFACE LOGIC CIRCUIT FOR IMPROVING PAD EMPLOYMENT EFFICIENCY AT DA MODE
SEMICONDUCTOR MEMORY DEVICE HAVING BUS INTERFACE LOGIC CIRCUIT FOR IMPROVING PAD EMPLOYMENT EFFICIENCY AT DA MODE
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机译:具有总线接口逻辑电路的半导体存储器,可提高DA模式下的PAD作业效率
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摘要
invention DA mode when the pad used to increase the efficiency of bus interface logic circuit for a semiconductor memory device having a relative is described. Amplifying the bus interface logic circuit includes a first and second output signals provided by the output driver of the present invention compared to a differential amplifier that delivers the result to the first and second data output pad, DA mode, the second data input a switching unit having a second transmission gate to block the connection of the first transmission gate and a second data input and output pads and the differential amplifier delivering a power supply voltage to the output of the pad and connected to a differential amplifier, and input to the second data input and output pad a DA mode, the address includes a buffer for transmission to a semiconductor memory device inside. Therefore, according to the bus interface logic circuit of the present invention, to prevent the change of the first data input signal swing pad by an address input to the second data input pad when DA mode, the use of the semiconductor pads when the second data input mode DA improves the pin (or pad) of the memory device efficiency.
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