On-chip serialized peripheral bus system and operating method thereof

摘要

The present invention is an on-relates to a chip serial peripheral bus system and its operation method, when connecting a plurality of low speed peripherals to the system using a high-speed parallel bus serial existing parallel bus system for connecting a low-speed peripheral devices by bus screen, there is an effect that at the same time as reducing the bus width of a parallel bus connected to improve the response time of low-speed peripheral devices, and by reducing the number of simultaneous transitions of the frequency of peripheral device connected to the system bus to increase the performance of the overall system. ; A parallel bus, a serial bus, the on-chip serial peripheral bus, point-to-point connection, the on-chip serial peripheral controller