首页> 外国专利> Interconnection for test measurement and logical analysis systems and probes for integrated circuits has flexible layers with contact bumps sandwiching rigid layer with holes

Interconnection for test measurement and logical analysis systems and probes for integrated circuits has flexible layers with contact bumps sandwiching rigid layer with holes

机译:用于测试测量和逻辑分析系统以及集成电路探针的互连具有柔性层,该柔性层的接触凸点将带孔的刚性层夹在中间

摘要

An interconnection (100) comprises a rigid layer (102) with many through holes (112) joined on either side to a flexible layer (104,106) with many conductive contact bumps (108,110) positioned over the holes and with signal paths in the holes connecting the contact bumps in the flexible layers. Independent claims are also included for the following: (A) further interconnection systems as above;and (B) production processes for the above.
机译:互连(100)包括刚性层(102),该刚性层(102)具有在任一侧上连接至柔性层(104,106)的多个通孔(112),柔性层(104,106)具有位于孔上方的许多导电接触凸点(108,110),并且孔中的信号路径连接柔性层中的接触凸点。还包括以下方面的独立权利要求:(A)如上所述的其他互连系统;和(B)上述的生产过程。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号