METHOD OF MANUFACTURING CHIP AND FET (TRANSISTOR HAVING DIELECTRIC STRESSOR ELEMENT FOR APPLYING IN-PLANE SHEAR STRESS)

摘要

PROBLEM TO BE SOLVED: To provide a transistor having a dielectric stressor for applying in-plane shear stress.;SOLUTION: A chip is provided which includes an active semiconductor region and a field effect transistor ("FET") having a channel region, a source region, and a drain region all arranged within the active semiconductor region. The FET has a longitudinal direction in the lengthwise direction of the channel region, and a transverse direction in the widthwise direction of the channel region. A first dielectric stressor element having a horizontally extending upper surface extends below a portion of the active semiconductor region, such as a northwest portion of the active semiconductor region. A second dielectric stressor element having a horizontally extending upper surface extends below one second portion of the active semiconductor region, such as a southeast portion of the active semiconductor region. Each of the first and second dielectric stressor elements shares an edge with the active semiconductor region, and the edges extending in directions away from the upper surface.;COPYRIGHT: (C)2007,JPO&INPIT