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Pulse-width control loop for clock with pulse-width ratio within wide range
Pulse-width control loop for clock with pulse-width ratio within wide range
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机译:脉宽比在宽范围内的时钟的脉宽控制环路
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摘要
A pulse-width control loop (PWCL) for clock with any pulse-width ratio within a wide range is provided. A differential programmable charge pump is employed to stabilize the current source by complementary connection. The differential programmable charge pump has a pair of differential charge pumps and a current source module to adjust the ratio of charge to discharge, so as to accelerate the range of the adjustable pulse-width ratio of the output clock and increase the output resolution. Further, a ratioless input control stage is employed to simplify the circuit design and avoid static power consumption. Moreover, the control stage adjusts rising pulse width and dropping pulse width at one period, thereby accelerating the lock speed and the range of the adjustable pulse-width ratio (i.e., duty cycle) of the input clock.
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