Memory circuit arrangement and method for reading and/or verifying the status of memory cells of a memory cell array

摘要

A memory circuit arrangement includes a memory cell array having a plurality of memory cells. A memory read/verify control circuit controls a read operation and/or a verify operation on one or a plurality of memory cells of the memory cell array. The memory read/verify control circuit is adapted to read and/or verify the status of each memory cell of the memory cell array according to read and/or verify instruction information on memory cell level.