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Delay circuit with constant delay time regardless of process condition or voltage variation and pulse generator using the same

机译:具有恒定延迟时间的延迟电路,与过程条件或电压变化无关,并且脉冲发生器使用该延迟电路

摘要

A delaying circuit is capable of constantly maintaining its delay regardless of process condition or voltage variation and a pulse generating circuit uses the delaying circuit. The delay circuit for delaying a signal that is inputted to an input stage by a predetermined time to output to an output stage, comprises a pull-up unit for pulling up the output stage in response to the signal that is inputted to the input stage, the pull-up unit including a first resistor device and a first MOS transistor that is maintained in turn-on state and is coupled to the first resistor device in parallel to delay the signal that is inputted to the input stage by the predetermined time; and a pull-down unit for pulling down the output stage in response to the signal that is inputted to the input stage.
机译:不管处理条件或电压变化如何,延迟电路都能够恒定地保持其延迟,并且脉冲产生电路使用该延迟电路。用于将输入到输入级的信号延迟预定时间以输出到输出级的延迟电路包括:上拉单元,用于响应于输入到输入级的信号而上拉输出级;上拉单元,其包括第一电阻器和第一MOS晶体管,其保持导通状态并且并联耦合到第一电阻器,以将输入到输入级的信号延迟预定时间。下拉单元,用于响应输入到输入级的信号而下拉输出级。

著录项

  • 公开/公告号US2007205819A1

    专利类型

  • 公开/公告日2007-09-06

    原文格式PDF

  • 申请/专利权人 SAN-HA PARK;

    申请/专利号US20070797263

  • 发明设计人 SAN-HA PARK;

    申请日2007-05-02

  • 分类号H03H11/26;

  • 国家 US

  • 入库时间 2022-08-21 21:03:45

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